application note AN35 AN35-1 interfacing the x24c44/45 novrams to the motorola 68hc11 microcontroller by applications staff, july 1992 the following code demonstrates how the xicor x24c44/45 serial novrams can be interfaced to the motorola 68hc11 microcontroller family when connected as shown in figure 1. the code uses three pins from port d to implement the interface. additional code can be found on the xicor web site at http:// www.xicor.com that will implement interfaces between several other motorola microcontroller families and most xicor serial devices. u2 68hc11a8 xt 30 ex 29 reset 39 irq 41 xirq 40 pa0 8 pa1 7 pa2 6 pe0 17 pe1 18 pe2 19 pe3 20 vrh 22 vrl 21 pa3 5 pa4 4 pa5 3 pa6 2 pa7 1 pb0 16 pb1 15 pb2 14 pb3 13 pb4 12 pb5 11 pb6 10 pb7 9 pc0 31 pc1 32 pc2 33 pc3 34 pc4 35 pc5 36 pc6 37 pc7 38 pd0 42 pd1 43 pd2 44 pd3 45 pd4 46 pd5 47 moda 25 modb 24 e 27 as 26 r/w 28 vcc u1 x24c44 di 3 ce 1 sk 2 recall 6 store 7 do 4 fi g ure 1. interfacin g an x24c44 to a 68hc11 microcontroller usin g port d
xicor application note AN35-2 AN35 ******************************************************************************* * this code was designed to demonstrate how the x24c44 could be interfaced to * * the 68hc11 microcontroller. the interface uses 3 lines from port 1 (pd3, * * pd4, and pd5) to communicate. the di and do pins on the x24c44 are tied * * together which allows 1 less port line to be used. * * * * the code shown demonstrates rcl, wren, read, write, and store * * instructions. the remaining instructions (wrds and enas) can be issued * * using the same routine as other non-data instructions. * * * * the program issues a sequence of instructions to read the contents of * * address 5 and stores the same value in address 9. the sequence of * * instructions is as follows : * * 1. rcl sets the previous recall latch * * 2. wren sets the write enable latch * * 3. read data from address 5 is read * * 4. write the data read during step 3 is written to address 9 * * 5. sto the ram's contents is transfered to the eeprom * * * * data transfer is performed with the most significant bit first. during * * the read and write instructions the data sequence is inverted from that * * shown in the data book (d15 is shifted first). * **************************************************************************** * ** skbit equ $08 mask indicating portd sk position cebit equ $10 mask indicating portd ce position diobit equ $20 mask indicating portd data position dout equ $38 mask to make di/o an output din equ $18 mask to make di/o an input wrds equ $80 reset write enable latch sto equ $81 transfers from ram to eeprom enas equ $82 places part into power down mode write equ $83 ram write wren equ $84 set write enable latch rcl equ $85 transfers from eeprom to ram, resets * write enable latch read equ $86 ram read ddrd equ $09 data direction register for port d portd equ $08 address for port d addr equ $80 location for x 24 c 44 address to access inst equ $81 instruction for part rwdat equ $82 location for x 24 c 44 data transfered count equ $84 counter variable ********************************************* * reset vector to beginning of program code * ********************************************* org $fffe reset vector to program entry point fdb $e000
AN35-3 xicor application note AN35 ****************************** * start of program execution * ****************************** org $e000 beginning of executable code begin: lds #$00ff initialize stack pointer ldx #$1000 initialize page offset location ldaa #dout staa ddrd,x make ce, sk, di/o outputs ldaa #$00 staa portd,x initialize ce, sk, di/o to zeros ldaa #rcl perform a recall to set staa inst the recall latch jsr cehigh jsr outbyt jsr celow ldaa #wren perform a write enable to set staa inst the write enable latch jsr cehigh jsr outbyt jsr celow ldaa #$05 read the contents of address 5 staa addr the value read will be in stored jsr rdwrd in rwdata ldaa #$09 write the data just read into staa addr address 9 jsr wrwrd ldaa #sto perform a store operation staa inst jsr cehigh jsr outbyt jsr celow bra * loop until reset ****************************************************** * write the word specified in rwdat. the address to * * be written is specified in addr. * ****************************************************** wrwrd: jsr cehigh write value in rwdata into location ldaa addr specified in addr lsla justify address in instruction lsla lsla oraa #write mask in write instruction staa inst jsr outbyt send write instruction to dut ldaa rwdat staa inst jsr outbyt send in upper byte of data ldaa rwdat+1 staa inst
xicor application note AN35-4 AN35 jsr outbyt send in lower byte of data jsr celow rts ********************************************************* * read the word at the location specified in addr. the * * data read will be placed in rwdat. * ********************************************************* rdwrd: jsr cehigh read the address specified in addr ldaa addr lsla justify address to read lsla lsla oraa #read mask in read instruction staa inst jsr send7 send in 7 bits of read instruction ldaa #din make data line an input staa ddrd,x jsr clock send eighth clock pulse for read instruction ldaa #$10 prepare to shift in 16 bits staa count bitx: clc assume bit is going to be a zero (clear carry) ldaa portd,x read bit value beq no1 leave carry flag alone if bit is a 0 sec set carry if bit is a 1 no1: rol rwdat+1 roll carry flag into data word rol rwdat jsr clock send a clock pulse dec count loop until bne bitx 16 bits are read ldaa #dout make data line an output staa ddrd,x jsr celow bring ce low rts ****************************************************** * send data out to the part. the data to be sent is * * located in inst. * ****************************************************** send7: ldaa #$07 shift out 7 bits for read instruction staa count bra loopo outbyt: ldaa #$08 prepare to shift out 8 bits staa count loopo: rol inst bcc is0 jump if data should be 0 bset portd,x diobit send 1 to di/o bra is1 is0: bclr portd,x diobit send 0 to di/o is1: jsr clock send clock signal
AN35-5 xicor application note AN35 dec count bne loopo loop until all 8 bits have been sent rts ***************** * bring ce high * ***************** cehigh: bset portd,x #cebit bring ce high rts **************** * bring ce low * **************** celow: bclr portd,x diobit bring data line low bclr portd,x #cebit bring ce low rts ********************** * issue a clock pulse * **************** clock: bset portd,x skbit bring sk high bclr portd,x skbit bring sk low rts
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